Microchip SY56016R Bedienungsanleitung
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SY56016R
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SY56016R
Low Voltage 1.2V/1.8V/2.5V CML Differential
Line Driver/Receiver 6.4Gbps with Equalization
Precision Edge is a registered trademark of Micrel, Inc
MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
December 2008
M9999-121708-A
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY56016R is a fully differential, low voltage
1.2V/1.8V/2.5V CML Line Driver/Receiver with input
equalization. The SY56016R can process clock signals as
fast as 5.0GHz or data patterns up to 6.4Gbps.
The differential input includes Micrel’s unique, 3-pin input
termination architecture that interfaces to CML differential
signals, without any level-shifting or termination resistor
networks in the signal path. The differential input can also
accept AC-coupled CML, LVPECL, and LVDS signals.
Input voltages as small as 200mV (400mV
PP
) are applied
before the 9”, 18” or 27” FR4 transmission line. For AC-
coupled input interface applications, an internal voltage
reference is provided to bias the V
T
pin. The outputs are
CML, with extremely fast rise/fall times guaranteed to be
less than 80ps.
The SY56016R operates from a 2.5V ±5% core supply and
a 1.2V, 1.8V or 2.5V ±5% output supply and is guaranteed
over the full industrial temperature range (–40°C to
+85°C). The SY56016R is part of Micrel’s high-speed,
Precision Edge
®
product line.
Datasheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Functional Block Diagram
Precision Edge
®
Features
∑ 1.2V/1.8V/2.5V CML Differential Line Driver/Receiver
with Equalization
∑ Equalizes 9, 18, 27 inches of FR4
∑ Guaranteed AC performance over temperature and
voltage:
– DC-to >6.4Gbps Data throughput
– DC-to >5.0GHz Clock throughput
– <250ps propagation delay (IN-to-Q)
– <80ps rise/fall times
∑ Ultra-low jitter design
– <1ps
RMS
random jitter
∑ High-speed CML outputs
∑ 2.5V ±5% V
CC
, 1.2V/1.8V/2.5V ±5% V
CCO
power supply
operation
∑ Industrial temperature range: –40°C to +85°C
∑ Available in 10-pin (2mm x 2mm) MLF
®
package
Applications
∑ Data Distribution:
∑ SONET clock and data distribution
∑ Fibre Channel clock and data distribution
∑ Gigabit Ethernet clock and data distribution
Markets
∑ Storage
∑ Test and measurement
∑ Enterprise networking equipment
∑ High-end servers
∑ Metro area network equipment
Micrel, Inc.
SY56016R
December 2008
2
M9999-121708-A
hbwhelp@micrel.com or (408) 955-1690
Ordering Information
Part Number
Package
Type
Operating
Range
Package Marking
Lead
Finish
SY56016RMG
MLF-10
Industrial
R016 with
Pb-Free bar-line indicator
NiPdAu
Pb-Free
SY56016RMGTR
(2)
MLF-10
Industrial
R016 with
Pb-Free bar-line indicator
NiPdAu
Pb-Free
Note:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
Pin Configuration
Truth Table
EQ
Equalization
LOW
9”
FLOAT
18”
HIGH
27”
10-Pin MLF
®
(MLF-10)
Pin Description
Pin Number
Pin Name
Pin Function
2, 3
IN, /IN
Differential Input: Signals as small as 200mV V
PK
(400mV
PP
) can be applied to the input of
9, 18 or 27 inches 6 mil FR4 stripline transmission line. They are then terminated at the
differential input internally with 50Ω to the VT pin.
1
VT
Input Termination Center-Tap: Each side of the differential input pair terminates to VT pin.
This pin provides a center-tap to a termination network for maximum interface flexibility. An
internal high impedance resistor divider biases VT to allow input AC coupling. For AC
coupling, bypass VT with 0.1µF low ESR capacitor to VCC. See “Interface Applications”
subsection and Figure 2a.
4
EQ
Three level input for equalization control. High, float, low.
10
VCC
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the V
CC
pin as possible. Supplies input and core circuitry.
6, 9
VCCO
Output Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the V
CCO
pins as
possible. Supplies the output buffer.
5
GND,
Exposed pad
Ground: Exposed pad must be connected to a ground plane that is the same potential as
the ground pin.
8, 7
Q0, /Q0
CML Differential Output Pair: Differential buffered copy of the input signal. The output swing
is typically 390mV. See “Interface Applications” sub-section for termination information.
Produktspezifikationen
| Marke: | Microchip |
| Kategorie: | Nicht kategorisiert |
| Modell: | SY56016R |
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