Microchip SY88083L Bedienungsanleitung


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SY88083L
1G to 12.5G Limiting Post Amplifier with
Digital Offset Correction
Revision 1.0
.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
November
8, 2013
Revision 1.0
HBWhelp@micrel.com or (408) 955-1690
General Description
The SY88083L limiting post amplifier is designed for use in
fiber-optic receivers for continuous mode, multi-rate
applications from 1Gbps to 12.5Gbps.
The SY88083L contains a high-bandwidth, high-sensitivity
input stage with user-programmable, wide-range SD
assert/LOS de-assert threshold levels, which enables
optimized system reach. Typically, 4dB of electrical
hysteresis is provided to minimize LOS or SD chattering
caused by noisy input signals. A logic level control pin is
provided to enable user selection of an open-collector,
TTL-compatible LOS or SD status indication signal with an
external 5kΩ to 10kΩ pull-up resistor.
The SY88083L provides faster SD assert and LOS de-
assert times than typical continuous mode devices over
the entire differential input voltage range of 10mV
PP
to
1800mV
PP
.
The SY88083L input stage also provides a user-selectable
digital offset correction (DOC) function to automatically
compensate for internal device offsets in the high-speed
data path.
The SY88083L provides integrated 50Ω input and output
impedances to optimize the high-speed signal paths and
reduce component count. A TTL-compatible JAM input is
provided to enable a SQUELCH function by feeding back
the LOS or SD signal. The JAM input disables only the
post amplifier output.
The SY88083L operates from a single +3.3V power
supply, over temperatures ranging from 40°C to +85°C.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com
.
Features
Multi-rate operation from 1.0625Gbps to 12.5Gbps
Selectable digital offset correction for internal offset
compensation in the high-speed data path
Wide differential input range (10mV
PP
to 1800mV
PP
)
Wide SD de-assert or LOS assert threshold range
4.5mV
PP
to 30mV
PP
4dB typical electrical hysteresis
Fast SD assert and LOS de-assert times
1µs typical; s maximum
Selectable LOS or SD status signal indicator
TTL-compatible JAM input with internal pull-up
Low-noise CML data inputs with integrated 50Ω
termination impedance to internal reference V
REF
Low-noise CML data outputs with integrated 50Ω
termination impedance
30ps typical rise/fall times
Wide range power supply: 3.3V ±10%
Industrial temperature range: 40°C to +85°C
Available in a tiny 3mm × 3mm QFN package
Applications
10G/8G Fibre Channel
10Gigabit Ethernet
OTN equipment
SONET OC192; SDH STM64
WDM/DWDM systems
Markets
Fibre Channel storage area networks
Datacom/Enterprise
High-performance computing
Telecom
Wireless base stations
Micrel, Inc.
SY88083L
November
8, 2013 2
Revision 1.0
HBWhelp@micrel.com or (408) 955-1690
Typical Application Circuit
Ordering Information
Part Number Package Type Operating Range Package Marking Lead Finish
SY88083LMG 3mm × 3mm QFN-16 Industrial 083L with Pb-Free bar-line indicator NiPdAu Pb-Free
SY88083LMG TR
(1)
3mm × 3mm QFN-16 Industrial 083L with Pb-Free bar-line indicator NiPdAu Pb-Free
Note:
1. Tape and reel.


Produktspezifikationen

Marke: Microchip
Kategorie: Nicht kategorisiert
Modell: SY88083L

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