Microchip SY89112U Bedienungsanleitung
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SY89112U
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SY89112U
2.5/3.3V Low-Jitter, Low-Skew 1:12 LVPECL
Fanout Buer with 2:1 Input MUX and
Internal Termination
Micrel Inc. • 2180 Fortune Drive • Jose, CA 95131 • USA • tel +1 (408) 944 0800 • fax + 1 (408) 474 1000 • San - - http://www.micrel.com
April 8, 2014
0 -6.0 40814
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY89112U is a low-jitter, low-skew, high-speed
LVPECL 1:12 dierential fanout buer optimized for
precision telecom and enterprise server distribution
applications. The input includes a 2:1 MUX for clock
switchover application. Unlike other multiplexers, this input
includes a unique isolation design to minimize channel- -to
channel crosstalk. The SY89112U distributes clock
frequencies from DC to >2GHz guaranteed over
temperature and voltage. The SY89112U incorporates a
synchronous output enable (EN) so that the outputs will
only be enabled/disabled when they are already in the
LOW state. This reduces the chance of generating “runt”
clock pulses.
The SY89112U differential input includes Micrel’s unique,
patent-pending 3-pin input termination architecture that
directly interfaces to any dierential signal (AC- or DC-
coupled) as small as 100mV (200mVpp) without any level
shifting or termination resistor networks in the signal path.
For AC-coupled input interface, an on-board output
reference voltage (VREF-AC) is provided to bias the
center-tap (VT) pin. The outputs are 800mV, 100K-
compatible LVPECL with fast rise/fall times guaranteed to
be less than 220ps.
The SY89112U operates from a 2.5V ±5% or 3.3V ±10%
supply and is guaranteed over the full industrial
temperature range of 40°C to +85°C. The SY89112U is –
part of Micrel’s high-speed, Precision Edge® product line.
Datasheets and support documentation are available on
Micrel’s web site at: . www.micrel.com
Features
Selects between 1 of 2 inputs, and provides 12
precision, low skew LVPECL output copies
Guaranteed AC performance over temperature and
voltage:
DC to >2GHz throughput
<550ps propagation delay CLK- -to Q
<220ps rise/fall time
<25ps output- -output skewto
Ultra-low jitter design:
50fsRMS phase jitter (typ.)
<0.7psRMS crosstalk induced jitter
Unique, patent-pending input termination and VT pin
accepts DC-coupled and AC-coupled dierential inputs
Unique, patent-pending 2:1 input MUX provides superior
isolation to minimize channel- -channel crosstalkto
800mV, 100K LVPECL output swing
Power supply 2.5V +5% or 3.3V +10%
Industrial temperature range 40°C to +85°C–
Available in 44-pin (7mm x 7mm) QFN package
Applications
Multi-processor server
SONET/SDH clock/data distribution
Fibre Channel distribution
Gigabit Ethernet clock distribution
Precision Edge is a registered trademark of Micrel, Inc.
Micrel, Inc.
SY89112U
April 8, 2014
2
0 -6.0 40814
hbwhelp@micrel.com or (408) 955-1690
Functional Block Diagram
Micrel, Inc.
SY89112U
April 8, 2014
3
0 -6.0 40814
hbwhelp@micrel.com or (408) 955-1690
Ordering Information
Part Number( )1
Package Type
Operating Range
Package Marking
Lead Finish
SY89112UMI
QFN- 44
Industrial
SY89112U
Sn Pb-
SY89112UMITR( )2
QFN- 44
Industrial
SY89112U
Sn Pb-
SY89112UMY
QFN- 44
Industrial
SY89112U with
Pb-Free bar-line indicator
Matte- Sn
Pb-Free
SY89112UMYTR( )2
QFN- 44
Industrial
SY89112U with
Pb-Free bar-line indicator
Matte- Sn
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A = 25°C, DC Electricals only.
2. Tape and Reel.
Pin Configuration
44-Pin QFN
Produktspezifikationen
| Marke: | Microchip |
| Kategorie: | Nicht kategorisiert |
| Modell: | SY89112U |
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