Texas Instruments SN74AHC125D Bedienungsanleitung
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SN74AHC125D
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1OE
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1A 1Y
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2OE
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2A 2Y
6
10
3OE
9
3A 3Y
8
13
4OE
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4A 4Y
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN54AHC125
,
SN74AHC125
SCLS256L – DECEMBER 1995 – REVISED NOVEMBER 2016
SNx4AHC125 Quadruple Bus Buer Gates With 3-State Outputs
1
1 Features
1
• Operating Range: 2 V to 5.5 V
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• Four Individual Output Enable Pins
• All Inputs Have Schmitt-Trigger Action
2 Applications
• Flow Meters
• Programmable Logic Controllers
• Power Over Ethernet (PoE)
• Motor Drives and Controls
• Electronic Point-of-Sale
3 Description
The SNx4AHC125 devices are quadruple bus buer
gates featuring independent line drivers with 3-state
outputs. Each output is disabled when the associated
output-enable (OE) input is high. When OE is low, the
respective gate passes the data from the A input to
its Y output.
To ensure the high-impedance state during power up
or power down, OE must be tied to V CC through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
Device Information(1)
PART NUMBER PACKAGE (PINS) BODY SIZE (NOM)
SNx4AHC125FK LCCC (20) 8.89 mm 8.89 mm
SNx4AHC125DB SSOP (14) 6.20 mm 5.30 mm
SNx4AHC125D SOIC (14) 8.65 mm × 3.91 mm
SNx4AHC125NS SO (14) 10.30 mm × 5.30 mm
SNx4AHC125W CFP (14) 9.21 mm × 5.97 mm
SNx4AHC125DGV TVSOP (14) 3.60 mm × 4.40 mm
SNx4AHC125PW TSSOP (14) 5.00 mm × 4.40 mm
SNx4AHC125N PDIP (14) 19.30 mm × 6.35 mm
SNx4AHC125RGY VQFN (14) 3.50 mm × 3.50 mm
SNx4AHC125J CDIP (14) 19.56 mm × 6.67 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.

2
SN54AHC125
,
SN74AHC125
SCLS256L – DECEMBER 1995 – REVISED NOVEMBER 2016
www.ti.com
Product Folder Links: SN54AHC125 SN74AHC125
Submit Documentation Feedback Copyright © 1995–2016, Texas Instruments Incorporated
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Conguration and Functions ......................... 3
6 Specications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions ....................... 5
6.4 Thermal Information.................................................. 6
6.5 Electrical Characteristics........................................... 6
6.6 Switching Characteristics: VCC = 3.3 V ±0.3 V ......... 8
6.7 Switching Characteristics: VCC = 5 V ±0.5 V ............ 9
6.8 Noise Characteristics .............................................. 10
6.9 Operating Characteristics........................................ 10
6.10 Typical Characteristics .......................................... 10
7 Parameter Measurement Information ................ 11
8 Detailed Description ............................................ 12
8.1 Overview ................................................................. 12
8.2 Functional Block Diagram ....................................... 12
8.3 Feature Description................................................. 12
8.4 Device Functional Modes........................................ 12
9 Application and Implementation ........................ 13
9.1 Application Information............................................ 13
9.2 Typical Application .................................................. 13
10 Power Supply Recommendations ..................... 15
11 Layout................................................................... 15
11.1 Layout Guidelines ................................................. 15
11.2 Layout Example .................................................... 15
12 Device and Documentation Support ................. 16
12.1 Documentation Support ........................................ 16
12.2 Related Links ........................................................ 16
12.3 Receiving Notication of Documentation Updates 16
12.4 Community Resources.......................................... 16
12.5 Trademarks ........................................................... 16
12.6 Electrostatic Discharge Caution............................ 16
12.7 Glossary ................................................................ 16
13 Mechanical, Packaging, and Orderable
Information ........................................................... 16
4 Revision History
NOTE: Page numbers for previous revisions may dier from page numbers in the current version.
Changes from Revision K (June 2013) to Revision L Page
• Added table, section, ,ESD Ratings Feature Description Device Functional Modes Application and Implementation
section, section, section, section, andPower Supply Recommendations Layout Device and Documentation Support
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
• Deleted table; see at the end of the data sheet ......................................Ordering Information Package Option Addendum 1
• Changed Package thermal impedance, RθJA, value in table From: 86°C/W To: 92.6°C/W (D),Thermal Information
From: 96°C/W To: 107.3°C/W (DB), From: 127°C/W To: 134.6°C/W (DGV), From: 80°C/W To: 56.3°C/W (N), From:
76°C/W To: 89.9°C/W (NS), and From: 113°C/W To: 121.5°C/W (PW)................................................................................ 6
Changes from Revision J (December 1995) to Revision K Page
• Changed document format from Quicksilver to DocZone ...................................................................................................... 1
• Extended operating temperature range to 125°C................................................................................................................... 5

41Y
5NC
62OE
7NC
82A
92Y
10GND
11NC
123Y
133A
14 3OE
15 NC
16 4Y
17 NC
18 4A
19 4OE
20 VCC
1 NC
2 1OE
3 1A
Not to scale
11OE 14 VCC
21A 13 4OE
31Y 12 4A
42OE 11 4Y
52A 10 3OE
62Y 9 3A
7GND 8 3Y
Not to scale
1 14
7 8
2
3
4
5
6
13
12
11
10
9
4OE
4A
4Y
3OE
3A
1A
1Y
2OE
2A
2Y
1OE
3Y V
GND
CC
3
SN54AHC125
,
SN74AHC125
www.ti.com
SCLS256L – DECEMBER 1995 – REVISED NOVEMBER 2016
Product Folder Links: SN54AHC125 SN74AHC125
Submit Documentation FeedbackCopyright © 1995–2016, Texas Instruments Incorporated
5 Pin Conguration and Functions
D, DB, DGV, N, NS, J, W, or PW Package
14-Pin SOIC, SSOP, TVSOP, PDIP, SO, CDIP, CFP, or TSSOP
Top View
RGY Package
14-Pin VQFN
Top View
FK Package
20-Pin LCCC
Top View
Produktspezifikationen
Marke: | Texas Instruments |
Kategorie: | Nicht kategorisiert |
Modell: | SN74AHC125D |
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