Texas Instruments SN74LV138ADR Bedienungsanleitung
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SN74LV138ADR
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FEATURES
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
Y1
Y2
NC
Y3
Y4
C
G2A
NC
G2B
G1
B
A
NC
Y6
Y5
V
Y0
Y7
GND
NC
SN54LV138A . . . FK PACKAGE
(TOP VIEW)
CC
NC − No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
B
C
G2A
G2B
G1
Y7
GND
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
SN54LV138A . . . J OR W PACKAGE
SN74LV138A . . . D, DB, DGV, NS
OR PW PACKAGE
(TOP VIEW)
SN74LV138A . . . RGY PACKAGE
(TOP VIEW)
1 16
8 9
2
3
4
5
6
7
15
14
13
12
11
10
Y0
Y1
Y2
Y3
Y4
Y5
B
C
G2A
G2B
G1
Y7
A
Y6 V
GND
CC
DESCRIPTION/ORDERING INFORMATION
SN54LV138A,
3-LINE TO 8-LINE DEC
SCLS395L – APRIL 1998
•2-V to 5.5-V V
CC Operation I•
o Supports Partial-Power-Down
Operation
•Max t
pd of 9.5 ns at 5 V
•Latch-Up Performance
•Typical V
OLP (Output Ground Bounce)
JESD 17
<0.8 V at V
CC = 3.3 V, T
A= 25 C°
•ESD Protection Exceeds
•Typical V
OHV (Output V
OH Undershoot)
>2.3 V at V
CC = 3.3 V, T
A= 25 C – 2000-V Human-Body°
•Support Mixed-Mode Voltage Operation
Ports – 1000-V Charged-Device
The 'LV138A devices are 3-line to 8-line decoders/dem
CC operation.
ORDERING INFORMATION
TAPACKAGE(1) ORDERABLE PART NUMBER
QFN – RGY Reel of 1000 SN74LV138ARGYR
Tube of 40 SN74LV138AD
SOIC – D LV138A
Reel of 2500 SN74LV138ADR
SOP – NS Reel of 2000 SN74LV138ANSR
–40 C to 85 C SSOP – DB Reel of 2000 SN74LV138AD° °
Tube of 90 SN74LV138APW
TSSOP – PW Reel of 2000 SN74LV138APWR
Reel of 250 SN74LV138APWT
TVSOP – DGV Reel of 2000 SN74LV138ADGVR
CDIP – J Tube of 25 SNJ54LV138AJ
–55 C to 125 C CFP – W Tube of 150 SNJ54LV138AW° °
LCCC – FK Tube of 55 SNJ54LV138AFK
(1) Package drawings, standard packing quantities, therma
www.ti.com/sc/package.
Please be aware that an important notice concerning
Instruments semiconductor products and disclaimers
UNLESS OTHERWISE NOTED this document contains PRO-
Copyright © 1998–2005, Tex
DUCTION DATA information current as of publication date. Prod-
ucts conform to specications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily
include testing of all parameters.
www.ti.com
DESCRIPTION/ORDERING INFORMATION
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS395L – APRIL 1998 – REVISED AUGUST 2005
These devices are designed for high-performance
short propagation delay times. In high-performance
the eects of system decoding. When employed
delay times of these decoders and the enable
the memory. This means that the eective system
The conditions at the binary-select inputs (A,
eight output lines. The two active-low ( G2A, G
external gates or inverters when expanding.
and a 32-line decoder requires only one inverter.
applications.
These devices are fully specied for partial-power-down
o. The I
o circuitry disables
outputs, preventing damaging current backow
FUNCTION TABLE
ENABLE INPUTS SELECT INPUTS
G1 G2A G2B C B A Y0 Y1 Y20 Y3
X H X X X X H H H H H H H
X X H X X X H H H H H H H
L X X X X X H H H H H H H
H L L L L L L H H H H H H
H L L L L H H L H H H H H
H L L L H L H H L H H H H
H L L L H H H H H L H H H
H L L H L L H H H H L H H
H L L H L H H H H H H L H
H L L H H L H H H H H H L
H L L H H H H H H H H H H
2
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G2B
G2A
G1
C
B
A
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Data
Outputs
Select
Inputs
Enable
Inputs
1
2
3
6
4
5
15
14
13
12
11
10
9
7
Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages.
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS395L – APRIL 1998
LOGIC DIAGRAM (POSITIVE
3
Produktspezifikationen
| Marke: | Texas Instruments |
| Kategorie: | Nicht kategorisiert |
| Modell: | SN74LV138ADR |
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