Texas Instruments SN74AUP1G17DCKR Bedienungsanleitung

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property mattersand other important disclaimers. PRODUCTION DATA.

SN74AUP1G17

SCES579J– JUNE2004 – REVISEDSEPTEMBER2017

SN74AUP1G17 Low-Power Single Schmitt-Trigger Buer

1

1 Features

1

•Latch-UpPerformance Exceeds 100mA Per

JESD 78,Class II

•ESD PerformanceTested PerJESD 22

–2000-V Human-BodyModel

(A114-B, ClassII)

–1000-V Charged-DeviceModel (C101)

•Available inthe TexasInstruments NanoStar™

Package

•Low Static-PowerConsumption

(ICC = 0.9µA Maximum)

•Low Dynamic-PowerConsumption

(Cpd =4.4 pFTypical at3.3 V)

•Low InputCapacitance (Ci= 1.5pF Typical)

•Low Noise – Overshootand Undershoot

<10% ofVCC

• Io Supports Partial-Power-Down Mode Operation

•Includes Schmitt-TriggerInputs

•Wide OperatingVCC Range of0.8 Vto 3.6V

•Optimized for3.3-V Operation

•3.6-V I/O Tolerant toSupport Mixed-Mode Signal

Operation

• tpd =5.1 nsMaximum at3.3 V

•Suitable forPoint-to-Point Applications

2 Applications

•Grid Infrastructure

•PC &Notebooks

• Tablets

•Factory Automation & Control

• Gaming

• Server

3 Description

TheAUP family of devices is TI's premier solutionto

the industry's low-power needs in battery-powered

portableapplications. This family ensures avery low

static-and dynamic-power consumption across the

entire VCC range of 0.8 V to 3.6 V, resulting in

increased battery life.This product also maintains

excellent signal integrity (seeAUP – TheLowest-

Power FamilyExcellentSignal Integrityand ).

This device functions as an independent gate with

Schmitt-trigger inputs,which allowsfor slowinput

transition and better switching-noise immunity at the

input.

NanoStar™ package technology is a major

breakthrough in ICpackaging concepts, using the die

as the package.

This device is fully specied for partial-power-down

applications using Io. The Io circuitry disablesthe

outputs when the device is powered down. This

inhibits current backow into the device which

preventsdamage tothe device.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)

SN74AUP1G17DBVSOT-23 (5)1.60 mm× 2.90 mm

SN74AUP1G17DCKSC70 (5)1.25 mm× 2.00 mm

SN74AUP1G17DRLSOT-5X3 (5)1.60 mm× 1.20 mm

SN74AUP1G17DRYSON (6)1.00 mm× 1.45 mm

SN74AUP1G17DSFSON (6)1.00mm ×1.00 mm

SN74AUP1G17YFPDSBGA (4)0.76 mm × 0.76 mm

SN74AUP1G17YZPDSBGA (5)0.89 mm × 1.39 mm

SN74AUP1G17DPWX2SON (5)0.80 mm× 0.80 mm

(1)Forall availablepackages, see theorderable addendumat

the end of the data sheet.

Logic Diagram(Positive Logic)

(DBV, DCK, DPW, DRL,DRT, DRY,and YZP

Packages)

Logic Diagram(Positive Logic)

(YFP Package)

Produktspezifikationen