Texas Instruments SN74AVC2T45DCTT Bedienungsanleitung
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SN74AVC2T45DCTT
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B1
DIR 5
7
A1 2
VCCA VCCB
B2
6
A2 3
18
VCCA VCCB
GND4
VCCA VCCB
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74AVC2T45
SCES531L –DECEMBER 2003 – REVISED MAY 2017
SN74AVC2T45 2-Bit, Dual Supply, Bus Transceiver
With Congurable Level-Shifting and Translation
1
1 Features
1
• Available in the Texas Instruments NanoFree™
Package
• VCC Isolation Feature: If Either VCC Input Is at
GND, Both Ports Are in the High-Impedance State
• Dual Supply Rail Design
• I/Os Are 4.6-V Over Voltage Tolerant
• Io Supports Partial-Power-Down Mode Operation
• Max Data Rates
– 500 Mbps (1.8 V to 3.3 V)
– 320 Mbps (<1.8 V to 3.3 V )
– 320 Mbps (Level-Shifting to 2.5 V or 1.8 V)
– 280 Mbps (Level-Shifting to 1.5 V)
– 240 Mbps (Level-Shifting to 1.2 V)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
2 Applications
• Smartphones
• Servers
• Desktop PCs and Notebooks
• Other Portable Devices
3 Description
This 2-bit non-inverting bus transceiver uses two
separate congurable power-supply rails. The A ports
are designed to track VCCA and accepts any supply
voltage from 1.2 V to 3.6 V. The B ports are designed
to track VCCB and accepts any supply voltage from
1.2 V to 3.6 V. This allows for universal low-voltage
bidirectional translation and level-shifting between
any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V
voltage nodes.
The SN74AVC2T45 is designed for asynchronous
communication between two data buses. The logic
levels of the direction-control (DIR pin) input activate
either the B-port outputs or the A-port outputs. The
device transmits data from the A bus to the B bus
when the B-port outputs are activated and from the B
bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports
always is active and must have a logic HIGH or LOW
level applied to prevent excess leakage current on
the internal CMOS structure.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SN74AVC2T45DCT SM8 (8) 2.95 mm × 2.80 mm
SN74AVC2T45DCU VSSOP (8) 2.30 mm × 2.00 mm
SN74AVC2T45YZP DSBGA (8) 1.89 mm × 0.89 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
(1) Pin numbers are for the DCT and DCU packages only.
Produktspezifikationen
| Marke: | Texas Instruments |
| Kategorie: | Nicht kategorisiert |
| Modell: | SN74AVC2T45DCTT |
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