Microchip SY89825U Bedienungsanleitung
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SY89825U
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1
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
FEATURES
■LVPECL or LVDS input to 22 LVPECL outputs
■100K ECL compatible outputs
■LVDS input includes 100Ω termination
■Guaranteed AC parameters over voltage:
• > 2GHz fMAX (toggle)
• < 35ps max. ch-ch skew
■Low voltage operation: 2.5V, 3.3V
■Temperature range: –40°C to +85°C
■Output enable pin
■Available in a 64-Pin EPAD-TQFP
The SY89825U is a High Performance Bus Clock Driver
with 22 differential LVPECL output pairs. This part is
designed for use in low voltage (2.5V, 3.3V) applications
which require a large number of outputs to drive precisely
aligned, ultra low skew signals to their destination. The
input is multiplexed from either LVDS or LVPECL by the
CLK_SEL pin. The LVDS input includes a 100 internalΩ
termination, thus eliminating the need for external
termination. The Output Enable (OE) is synchronous so
that the outputs will only be enabled/disabled when they
are already in the LOW state. This eliminates any chance
of generating a runt clock pulse when the device is enabled/
disabled as can happen with an asynchronous control.
The SY89825U features low pin-to-pin skew (35ps max.)
—performance previously unachievable in a standard
product having such a high number of outputs. The
SY89825U is available in a single space saving package
which provides a lower overall cost solution. In addition, a
single chip solution improves timing budgets by eliminating
the multiple device solution with their corresponding large
part-to-part skew.
2.5/3.3V 1:22 HIGH-PERFORMANCE,
LOW-VOLTAGE PECL BUS CLOCK DRIVER
& TRANSLATOR w/ INTERNAL TERMINATION
DESCRIPTION
Precision Edge®
SY89825U
APPLICATIONS
■High-performance PCs
■Workstations
■Parallel processor-based systems
■Other high-performance computing
■Communications
Rev.: D Amendment: /0
Issue Date:
January 2007
Precision Edge ®
Precision Edge is a registered trademark of Micrel, Inc.
2
Precision Edge®
SY89825U
Micrel, Inc.
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
PACKAGE/ORDERING INFORMATION
/Q5
VCCO
Q0
/Q0
Q1
/Q1
Q2
/Q2
Q3
/Q3
Q4
/Q4
Q5
Q6
/Q6
VCCO
VCCO
NC
NC
VCCI
LVDS_CLK
/LVDS_CLK
CLK_SEL
LVPECL_CLK
/LVPECL_CLK
GND
OE
NC
NC
/Q21
Q21
VCCO
VCCO
Q7
/Q7
Q8
/Q8
Q9
/Q9
Q10
/Q10
Q11
/Q11
Q12
/Q12
Q13
/Q13
VCCO
64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64-Pin
EPAD-TQFP
(Top View)
/Q19
VCCO
Q14
/Q14
Q15
/Q15
Q16
/Q16
Q17
/Q17
Q18
/Q18
Q19
Q20
/Q20
VCCO
64-Pin EPAD-TQFP (H64-1)
Ordering Information(1)
Package Operating Package Lead
Part Number Type Range Marking Finish
SY89825UHI H64-1 Industrial SY89825UHI Sn-Pb
SY89825UHITR(2) H64-1 Industrial SY89825UHI SN-PB
SY89825UHY(3) H64-1 Industrial SY89825UHY with Pb-Free
Pb-Free bar-line indicator Matte-Sn
SY89825UHYTR(2,3) H64-1 Industrial SY89825UHY with Pb-Free
Pb-Free bar-line indicator Matte-Sn
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A = 25°C, DC electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
LOGIC SYMBOL
CLK_SEL
LVDS_CLK
/LVDS_CLK
LVPECL_CLK
/LVPECL_CLK
OE
0
1
22
22
Q0 - Q21
/Q0 - /Q21
LEN
D
Q
Pin Function
LVDS_CLK, Differential LVDS Inputs
/LVDS_CLK
(Internal 100 termination included)Ω
LVPECL_CLK, Differential LVPECL Inputs.
/LVPECL_CLK
CLK_SEL Input CLK Select (LVTTL)
OE Output Enable (LVTTL)
Q0–Q21 , /Q
0–/Q21 Dierential LVPECL Outputs.
Terminate with 50Ω to V
CC-2V
GND Ground
V
CCI Power Supply. Connect to
VCC on PCB. VCCI and VCCO are not
internally connected
V
CCO Power Supply for Output Buer.
Connect to V
CCI on PCB. VCCI and
VCCO are not internally connected
PIN NAMES
3
Precision Edge®
SY89825U
Micrel, Inc.
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
OE(1) CLK_SEL Q0–Q21 /Q0–/Q21
0 0 LOW HIGH
0 1 LOW HIGH
1 0 LVDS_CLK /LVDS_CLK
1 1 LVPECL_CLK /LVPECL_CLK
TRUTH TABLE
NOTE:
1. The OE (output enable) signal is synchronized with the low level of the
LVDS_CLK and LVPECL_CLK signal.
Signal I/O Level
LVDS_CLK, /LVDS_CLK Input LVDS
Q0–Q21, /Q0–/Q21 Output LVPECL
LVPECL_CLK, /LVPECL_CLK Input LVPECL
CLK_SEL, OE Input LVCMOS/LVTTL
SIGNAL GROUPS
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data book. Exposure to ABSOLUTE MAXIMUM RATING conditions
for extended periods may aect device reliability.
Symbol Rating Value Unit
VCCI / VCCO VCC Pin Potential to Ground Pin –0.5 to +4.0 V
VIN Input Voltage –0.5 to VCCI V
IOUT DC Output Current –50 mA
Tstore Storage Temperature –65 to +150 °C
θJA Package Thermal Resistance (Junction-to-Ambient)
With exposed pad soldered to GND – Still-Air (multi-layer PCB) 23 °C/W
– 200lfpm (multi-layer PCB) 18 °C/W
– 500lfpm (multi-layer PCB) 15 °C/W
Exposed pad
not
soldered to GND – Still-Air (multi-layer PCB) 44 °C/W
– 200lfpm (multi-layer PCB) 36 °C/W
– 500lfpm (multi-layer PCB) 30 °C/W
θJC Package Thermal Resistance 4.3 °C/W
(Junction-to-Case)
Produktspezifikationen
| Marke: | Microchip |
| Kategorie: | Nicht kategorisiert |
| Modell: | SY89825U |
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